The present invention relates to digital multipliers used in fixed-point finite-precision recursive digital filters and has particular reference to apparatus for enhancing the precision of a multiplier using single-precision arithmetic without being forced to use extended-precision or floating-point arithmetic.
Multipliers used in fixed-point finite-precision recursive digital filters are the primary source of signal offset ("trapped bits") and roundoff noise. Attempts to avoid these problems drive users to more costly extended-precision or floating-point arithmetic. The invention presented herein is a bit untrapper which permits the use of single-precision arithmetic in applications where conventional wisdom says you can't. The bit untrapper insures that the quantization-noise path is (1-z.sup.-1).sup.m where m=0, 1, or 2. The m=0 case is simple rounding; in the other two cases one or two transmission zeros are placed in the quantization-noise path without affecting the signal path.
Since the poles of recursive digital filters are either real or occur in conjugate-complex pairs, any recursive digital filter can be made of first-order recursive section to mechanize real poles and second-order recursive sections to mechanize conjugate-complex pole pairs. First-order bit untrappers are used in first-order filters; both first- and second-order bit untrappers are used in second-order filters. Zeroth-order bit untrapping (rounding) is used for mechanization of zeros or gain scaling.